# R06: Duty-Free Bits: Projectivizing Garbling Schemes

This work studies projective conversion from Yao-style bit labels into affine encodings and related vector-OLE applications. PLLM status: tracked.

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Document ID: `pllm.docs.research.papers.r06-duty-free-bits`  
Release: `0.1.0`

**Status:** `tracked`
**Year:** 2026
**Authors:** Nakul Khambhati, Anwesh Bhattacharya, David Heath
**External source:** [Duty-Free Bits: Projectivizing Garbling Schemes](https://eprint.iacr.org/2026/476)

## Source contribution

This work studies projective conversion from Yao-style bit labels into affine encodings and related vector-OLE applications.

## PLLM perspective

Implement only conversions justified by the acquired full specification. Represent input/output label families, field, security assumptions and direction as types.

Primary abstract consulted; full construction acquisition and review are blocking tasks.

This paper remains tracked. Named modules below are implementation targets, not finished PLLM components; no reproduction, integration, assurance, or matched benchmark is claimed.

The source's boundary remains binding: The title does not grant free bidirectional conversion or a safe interface from freely editable masked scalars.

## PLLM modules and documentation

Target module identifiers: `convert.bit_to_affine`, `prepare.vector_ole`. These identifiers describe scoped work unless this page explicitly links an implementation source. Dependencies: R03, R04.

- [Research backlog](/research/backlog/)
- [Reimplementation backlog](/research/backlog/)
- [Clean-room workflow](/research/clean-room/)

## Backlog

This source is assigned to reimplementation priority 4, **Protected conversions and lookup**. Its source-registry order is 6. Follow current gates and unfinished work in the [research backlog](/research/backlog/).